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@marqueslanauja marqueslanauja commented Nov 21, 2025

Please check if the PR fulfills these requirements

  • The commit message follows our guidelines
  • Tests for the changes have been added (for bug fixes / features)
  • Docs have been added / updated (for bug fixes / features)
  • A PR or issue has been opened in all impacted repositories (if any)

Does this PR already have an issue describing the problem?

fixes #3560

What kind of change does this PR introduce?

Bug fix

What is the current behavior?

When a model is imported in busBreaker level, busbar sections are not imported. As a result, voltage regulating terminals defined on busbar sections are ignored, and the voltage regulating control is localized by setting the generator terminal as the regulating terminal.

What is the new behavior (if this is a feature change)?

When a nodeBreaker model is imported as busBreaker and voltage regulating controls are defined on busbar sections, we attempt to identify an equivalent IIDM terminal that is connected to the busbar section through switches.

The method RegulatingTerminalMapper.findSwitchCgmesTerminalIdForConnectivityNode is a bit cpu intensive but it will only be used when a nodeBreaker model is imported as busBreaker and voltage regulating terminals are defined on busbar sections

A new approach has been implemented without using the previous method (RegulatingTerminalMapper.findSwitchCgmesTerminalIdForConnectivityNode ). This new approach has no impact on CPU usage. The previous method has been removed.

Does this PR introduce a breaking change or deprecate an API?

  • Yes
  • No

If yes, please check if the following requirements are fulfilled

  • The Breaking Change or Deprecated label has been added
  • The migration steps are described in the following section

What changes might users need to make in their application due to this PR? (migration steps)

Other information:

@marqueslanauja marqueslanauja marked this pull request as ready for review November 21, 2025 16:09
@jeandemanged
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Hi @marqueslanauja ,
After some testing on real data (pan-EU CGM):

  • performance is an issue: time to import increases from 1'18 to 1'56. And only for 9 new regulating terminals properly identified.
  • I am not sure if I understand the implemented logic well, it seems it looks only "one switch away ?" Below a picture of my real case where a regulating terminal is still not identified, causing load flow divergence. The generator on top right regulates busbar section "1.1". The disconnectors are not retained, the breakers are - in case it matters.
image image

@marqueslanauja
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Hi @marqueslanauja , After some testing on real data (pan-EU CGM):

  • performance is an issue: time to import increases from 1'18 to 1'56. And only for 9 new regulating terminals properly identified.
  • I am not sure if I understand the implemented logic well, it seems it looks only "one switch away ?" Below a picture of my real case where a regulating terminal is still not identified, causing load flow divergence. The generator on top right regulates busbar section "1.1". The disconnectors are not retained, the breakers are - in case it matters.

image image

I've implemented a new approach. It has no impact on CPU usage. Using your Python code, I created a more complex case that I used as a unit test. Here is the diagram for the new case:

image

@jeandemanged
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I've implemented a new approach. It has no impact on CPU usage. Using your Python code, I created a more complex case that I used as a unit test. Here is the diagram for the new case:

Hi @marqueslanauja ,
Many thanks on the fix, just tested now: no more performance issue, and now the missing regulating terminals are well identified, load flow converges as expected!

}
Bus busBreakerView = context.network().getBusBreakerView().getBus(busbarSectionCgmesTerminal.topologicalNode());
return busBreakerView != null
? EquivalentTerminalFinderVoltageControl.best(EquivalentTerminalFinderVoltageControl.findTerminalsBusBranch(busBreakerView.getVoltageLevel(), busBreakerView))
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not sure here, my understanding is that findTerminalsBusBranch does not consider opened switches ?

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Both open and closed switches are considered. The regulating terminal is defined during the convert process, and at that point only the EQ file is considered. Switches are created as open or closed based on their normal state. Later, during the update phase, the switch statuses are updated using the SSH file

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Ok understood.

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As I mentioned in the issue #3560:

  • current practice in CGMES importer is to avoid defining fictitious equipment and instead try to find an equivalent terminal, however only one TopologicalNode is examined, other topological nodes connected via closed retained switches are ignored, but could be considered.
  • the current practice may be considered flawed: in case topology is changed (switches opened or closed) the chosen terminal may not be the relevant one anymore. To solve this we could instead define a fictitious zero loads to represent busbar sections and use this fictitious load terminal to be the regulating terminal.

bullet 1 is implemented, but not considering switches open/closed status. The fix works perhaps 90 % of the cases, but still is better than current situation...

Bullet 2 left for potential future work.

OK for me to merge as long as @rcourtier and @zamarrenolm also agree to merge.

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CGMES: Voltage Regulation on BusBarSection improperly imported for Bus/Branch model

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